Intel(R) Threading Building Blocks Doxygen Documentation
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17 #if !defined(__TBB_machine_H) || defined(__TBB_machine_msvc_ia32_common_H)
18 #error Do not #include this internal file directly; use public TBB headers instead.
21 #define __TBB_machine_msvc_ia32_common_H
26 #if !_M_X64 || __INTEL_COMPILER
27 #define __TBB_X86_MSVC_INLINE_ASM_AVAILABLE 1
30 #define __TBB_X86_MSVC_INLINE_ASM_AVAILABLE 0
31 #define __TBB_NO_X86_MSVC_INLINE_ASM_MSG "The compiler being used is not supported (outdated?)"
35 #define __TBB_r(reg_name) r##reg_name
36 #define __TBB_W(name) name##64
37 namespace tbb {
namespace internal {
namespace msvc_intrinsics {
41 #define __TBB_r(reg_name) e##reg_name
42 #define __TBB_W(name) name
43 namespace tbb {
namespace internal {
namespace msvc_intrinsics {
48 #if __TBB_MSVC_PART_WORD_INTERLOCKED_INTRINSICS_PRESENT
50 #define __TBB_MACHINE_DEFINE_ATOMICS(S,B,T,U) \
51 __pragma(intrinsic( _InterlockedCompareExchange##B )) \
52 static inline T __TBB_machine_cmpswp##S ( volatile void * ptr, U value, U comparand ) { \
53 return _InterlockedCompareExchange##B ( (T*)ptr, value, comparand ); \
55 __pragma(intrinsic( _InterlockedExchangeAdd##B )) \
56 static inline T __TBB_machine_fetchadd##S ( volatile void * ptr, U addend ) { \
57 return _InterlockedExchangeAdd##B ( (T*)ptr, addend ); \
59 __pragma(intrinsic( _InterlockedExchange##B )) \
60 static inline T __TBB_machine_fetchstore##S ( volatile void * ptr, U value ) { \
61 return _InterlockedExchange##B ( (T*)ptr, value ); \
73 #undef __TBB_MACHINE_DEFINE_ATOMICS
76 #if _MSC_VER>=1300 || __INTEL_COMPILER>=1100
77 #pragma intrinsic(_ReadWriteBarrier)
78 #pragma intrinsic(_mm_mfence)
79 #define __TBB_compiler_fence() _ReadWriteBarrier()
80 #define __TBB_full_memory_fence() _mm_mfence()
81 #elif __TBB_X86_MSVC_INLINE_ASM_AVAILABLE
82 #define __TBB_compiler_fence() __asm { __asm nop }
83 #define __TBB_full_memory_fence() __asm { __asm mfence }
85 #error Unsupported compiler; define __TBB_{control,acquire,release}_consistency_helper to support it
88 #define __TBB_control_consistency_helper() __TBB_compiler_fence()
89 #define __TBB_acquire_consistency_helper() __TBB_compiler_fence()
90 #define __TBB_release_consistency_helper() __TBB_compiler_fence()
92 #if (_MSC_VER>=1300) || (__INTEL_COMPILER)
93 #pragma intrinsic(_mm_pause)
94 namespace tbb {
namespace internal {
namespace msvc_intrinsics {
95 static inline void pause (uintptr_t delay ) {
96 for (;delay>0; --delay )
100 #define __TBB_Pause(V) tbb::internal::msvc_intrinsics::pause(V)
101 #define __TBB_SINGLE_PAUSE _mm_pause()
103 #if !__TBB_X86_MSVC_INLINE_ASM_AVAILABLE
104 #error __TBB_NO_X86_MSVC_INLINE_ASM_MSG
106 namespace tbb {
namespace internal {
namespace msvc_inline_asm
119 #define __TBB_Pause(V) tbb::internal::msvc_inline_asm::pause(V)
120 #define __TBB_SINGLE_PAUSE __asm pause
123 #if (_MSC_VER>=1400 && !__INTEL_COMPILER) || (__INTEL_COMPILER>=1200)
126 #pragma intrinsic(__TBB_W(_BitScanReverse))
127 namespace tbb {
namespace internal {
namespace msvc_intrinsics {
128 static inline uintptr_t
lg_bsr( uintptr_t i ){
130 __TBB_W(_BitScanReverse)( &j, i );
134 #define __TBB_Log2(V) tbb::internal::msvc_intrinsics::lg_bsr(V)
136 #if !__TBB_X86_MSVC_INLINE_ASM_AVAILABLE
137 #error __TBB_NO_X86_MSVC_INLINE_ASM_MSG
140 static inline uintptr_t
lg_bsr( uintptr_t i ){
150 #define __TBB_Log2(V) tbb::internal::msvc_inline_asm::lg_bsr(V)
154 #pragma intrinsic(__TBB_W(_InterlockedOr))
155 #pragma intrinsic(__TBB_W(_InterlockedAnd))
156 namespace tbb {
namespace internal {
namespace msvc_intrinsics {
157 static inline void lock_or(
volatile void *operand, intptr_t addend ){
158 __TBB_W(_InterlockedOr)((
volatile word*)operand, addend);
160 static inline void lock_and(
volatile void *operand, intptr_t addend ){
161 __TBB_W(_InterlockedAnd)((
volatile word*)operand, addend);
164 #define __TBB_AtomicOR(P,V) tbb::internal::msvc_intrinsics::lock_or(P,V)
165 #define __TBB_AtomicAND(P,V) tbb::internal::msvc_intrinsics::lock_and(P,V)
167 #if !__TBB_X86_MSVC_INLINE_ASM_AVAILABLE
168 #error __TBB_NO_X86_MSVC_INLINE_ASM_MSG
170 namespace tbb {
namespace internal {
namespace msvc_inline_asm {
171 static inline void lock_or(
volatile void *operand, __int32 addend ) {
179 static inline void lock_and(
volatile void *operand, __int32 addend ) {
188 #define __TBB_AtomicOR(P,V) tbb::internal::msvc_inline_asm::lock_or(P,V)
189 #define __TBB_AtomicAND(P,V) tbb::internal::msvc_inline_asm::lock_and(P,V)
192 #pragma intrinsic(__rdtsc)
197 #define __TBB_time_stamp() __TBB_machine_time_stamp()
200 #define __TBB_CPU_CTL_ENV_PRESENT 1
202 namespace tbb {
namespace internal {
class cpu_ctl_env; } }
203 #if __TBB_X86_MSVC_INLINE_ASM_AVAILABLE
243 #if !__TBB_WIN8UI_SUPPORT
244 extern "C" __declspec(dllimport)
int __stdcall SwitchToThread(
void );
245 #define __TBB_Yield() SwitchToThread()
248 #define __TBB_Yield() std::this_thread::yield()
262 #if __TBB_TSX_INTRINSICS_PRESENT
263 #define __TBB_machine_is_in_transaction _xtest
264 #define __TBB_machine_begin_transaction _xbegin
265 #define __TBB_machine_end_transaction _xend
268 #define __TBB_machine_transaction_conflict_abort() _xabort(0xFF)
static const int MXCSR_CONTROL_MASK
unsigned __int32 __TBB_EXPORTED_FUNC __TBB_machine_begin_transaction()
static void __TBB_machine_try_lock_elided_cancel()
void __TBB_set_cpu_ctl_env(const tbb::internal::cpu_ctl_env *ctl)
static void lock_and(volatile void *operand, __int32 addend)
#define __TBB_MACHINE_DEFINE_ATOMICS(S, T)
static tbb::internal::machine_tsc_t __TBB_machine_time_stamp()
void __TBB_EXPORTED_FUNC __TBB_machine_transaction_conflict_abort()
void __TBB_EXPORTED_FUNC __TBB_machine_end_transaction()
#define __TBB_SINGLE_PAUSE
void __TBB_EXPORTED_FUNC __TBB_machine_unlock_elided(volatile void *ptr)
__int8 __TBB_EXPORTED_FUNC __TBB_machine_is_in_transaction()
__declspec(dllimport) int __stdcall SwitchToThread(void)
namespace msvc_inline_asm static inline void pause(uintptr_t delay)
#define __TBB_r(reg_name)
void __TBB_get_cpu_ctl_env(tbb::internal::cpu_ctl_env *ctl)
void const char const char int ITT_FORMAT __itt_group_sync x void const char ITT_FORMAT __itt_group_sync s void ITT_FORMAT __itt_group_sync p void ITT_FORMAT p void ITT_FORMAT p no args __itt_suppress_mode_t unsigned int void size_t ITT_FORMAT d void ITT_FORMAT p void ITT_FORMAT p __itt_model_site __itt_model_site_instance ITT_FORMAT p __itt_model_task __itt_model_task_instance ITT_FORMAT p void * lock
__int8 __TBB_EXPORTED_FUNC __TBB_machine_try_lock_elided(volatile void *ptr)
static void lock_or(volatile void *operand, __int32 addend)
#define __TBB_EXPORTED_FUNC
bool operator!=(const cpu_ctl_env &ctl) const
static uintptr_t lg_bsr(uintptr_t i)
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