Intel(R) Threading Building Blocks Doxygen Documentation
version 4.2.3
|
Go to the documentation of this file.
17 #if !defined(__TBB_machine_H) || defined(__TBB_machine_linux_ia64_H)
18 #error Do not #include this internal file directly; use public TBB headers instead.
21 #define __TBB_machine_linux_ia64_H
24 #include <ia64intrin.h>
26 #define __TBB_WORDSIZE 8
27 #define __TBB_ENDIANNESS __TBB_ENDIAN_LITTLE
30 #define __TBB_compiler_fence()
31 #define __TBB_control_consistency_helper() __TBB_compiler_fence()
32 #define __TBB_acquire_consistency_helper()
33 #define __TBB_release_consistency_helper()
34 #define __TBB_full_memory_fence() __mf()
36 #define __TBB_compiler_fence() __asm__ __volatile__("": : :"memory")
37 #define __TBB_control_consistency_helper() __TBB_compiler_fence()
40 #define __TBB_acquire_consistency_helper() __TBB_compiler_fence()
41 #define __TBB_release_consistency_helper() __TBB_compiler_fence()
42 #define __TBB_full_memory_fence() __asm__ __volatile__("mf": : :"memory")
117 #define __TBB_machine_fetchadd1full_fence __TBB_machine_fetchadd1__TBB_full_fence
118 #define __TBB_machine_fetchadd2full_fence __TBB_machine_fetchadd2__TBB_full_fence
119 #define __TBB_machine_fetchadd4full_fence __TBB_machine_fetchadd4__TBB_full_fence
120 #define __TBB_machine_fetchadd8full_fence __TBB_machine_fetchadd8__TBB_full_fence
121 #define __TBB_machine_fetchstore1full_fence __TBB_machine_fetchstore1__TBB_full_fence
122 #define __TBB_machine_fetchstore2full_fence __TBB_machine_fetchstore2__TBB_full_fence
123 #define __TBB_machine_fetchstore4full_fence __TBB_machine_fetchstore4__TBB_full_fence
124 #define __TBB_machine_fetchstore8full_fence __TBB_machine_fetchstore8__TBB_full_fence
125 #define __TBB_machine_cmpswp1full_fence __TBB_machine_cmpswp1__TBB_full_fence
126 #define __TBB_machine_cmpswp2full_fence __TBB_machine_cmpswp2__TBB_full_fence
127 #define __TBB_machine_cmpswp4full_fence __TBB_machine_cmpswp4__TBB_full_fence
128 #define __TBB_machine_cmpswp8full_fence __TBB_machine_cmpswp8__TBB_full_fence
133 #define __TBB_machine_fetchadd1relaxed __TBB_machine_fetchadd1acquire
134 #define __TBB_machine_fetchadd2relaxed __TBB_machine_fetchadd2acquire
135 #define __TBB_machine_fetchadd4relaxed __TBB_machine_fetchadd4acquire
136 #define __TBB_machine_fetchadd8relaxed __TBB_machine_fetchadd8acquire
137 #define __TBB_machine_fetchstore1relaxed __TBB_machine_fetchstore1acquire
138 #define __TBB_machine_fetchstore2relaxed __TBB_machine_fetchstore2acquire
139 #define __TBB_machine_fetchstore4relaxed __TBB_machine_fetchstore4acquire
140 #define __TBB_machine_fetchstore8relaxed __TBB_machine_fetchstore8acquire
141 #define __TBB_machine_cmpswp1relaxed __TBB_machine_cmpswp1acquire
142 #define __TBB_machine_cmpswp2relaxed __TBB_machine_cmpswp2acquire
143 #define __TBB_machine_cmpswp4relaxed __TBB_machine_cmpswp4acquire
144 #define __TBB_machine_cmpswp8relaxed __TBB_machine_cmpswp8acquire
146 #define __TBB_MACHINE_DEFINE_ATOMICS(S,V) \
147 template <typename T> \
148 struct machine_load_store_relaxed<T,S> { \
149 static inline T load ( const T& location ) { \
150 return (T)__TBB_machine_load##S##_relaxed(&location); \
152 static inline void store ( T& location, T value ) { \
153 __TBB_machine_store##S##_relaxed(&location, (V)value); \
165 #undef __TBB_MACHINE_DEFINE_ATOMICS
167 #define __TBB_USE_FENCED_ATOMICS 1
168 #define __TBB_USE_GENERIC_HALF_FENCED_LOAD_STORE 1
169 #define __TBB_USE_GENERIC_SEQUENTIAL_CONSISTENCY_LOAD_STORE 1
172 #define __TBB_TryLockByte(P) __TBB_machine_trylockbyte(P)
173 #define __TBB_LockByte(P) __TBB_machine_lockbyte(P)
176 #define __TBB_Pause(V) __TBB_machine_pause(V)
177 #define __TBB_Log2(V) __TBB_machine_lg(V)
int32_t __TBB_machine_cmpswp4__TBB_full_fence(volatile void *ptr, int32_t value, int32_t comparand)
int32_t __TBB_machine_fetchstore4release(volatile void *ptr, int32_t value)
int32_t __TBB_machine_fetchadd4acquire(volatile void *ptr, int32_t addend)
bool __TBB_machine_trylockbyte(volatile unsigned char &ptr)
void __TBB_machine_pause(int32_t delay)
int16_t __TBB_machine_fetchstore2__TBB_full_fence(volatile void *ptr, int16_t value)
void __TBB_machine_store8_relaxed(void *ptr, int64_t value)
int16_t __TBB_machine_fetchadd2__TBB_full_fence(volatile void *ptr, int16_t addend)
int32_t __TBB_machine_fetchstore4__TBB_full_fence(volatile void *ptr, int32_t value)
int32_t __TBB_machine_cmpswp4acquire(volatile void *ptr, int32_t value, int32_t comparand)
int16_t __TBB_machine_fetchstore2acquire(volatile void *ptr, int16_t value)
int8_t __TBB_machine_fetchadd1release(volatile void *ptr, int8_t addend)
int32_t __TBB_machine_load1_relaxed(const void *ptr)
int64_t __TBB_machine_fetchadd8__TBB_full_fence(volatile void *ptr, int64_t value)
int64_t __TBB_machine_lockbyte(volatile unsigned char &ptr)
int16_t __TBB_machine_cmpswp2acquire(volatile void *ptr, int16_t value, int16_t comparand)
int8_t __TBB_machine_fetchadd1acquire(volatile void *ptr, int8_t addend)
int32_t __TBB_machine_fetchadd4release(volatile void *ptr, int32_t addend)
int8_t __TBB_machine_fetchstore1release(volatile void *ptr, int8_t value)
int8_t __TBB_machine_cmpswp1__TBB_full_fence(volatile void *ptr, int8_t value, int8_t comparand)
int64_t __TBB_machine_fetchstore8__TBB_full_fence(volatile void *ptr, int64_t value)
__TBB_MACHINE_DEFINE_ATOMICS(1, int8_t)
int16_t __TBB_machine_fetchadd2release(volatile void *ptr, int16_t addend)
int64_t __TBB_machine_cmpswp8__TBB_full_fence(volatile void *ptr, int64_t value, int64_t comparand)
int8_t __TBB_machine_fetchstore1acquire(volatile void *ptr, int8_t value)
void * __TBB_get_bsp()
Retrieves the current RSE backing store pointer. IA64 specific.
int64_t __TBB_machine_fetchadd8acquire(volatile void *ptr, int64_t addend)
int32_t __TBB_machine_cmpswp4release(volatile void *ptr, int32_t value, int32_t comparand)
int64_t __TBB_machine_fetchstore8acquire(volatile void *ptr, int64_t value)
int16_t __TBB_machine_cmpswp2__TBB_full_fence(volatile void *ptr, int16_t value, int16_t comparand)
int32_t __TBB_machine_load2_relaxed(const void *ptr)
int64_t __TBB_machine_cmpswp8acquire(volatile void *ptr, int64_t value, int64_t comparand)
void __TBB_machine_store2_relaxed(void *ptr, int32_t value)
int16_t __TBB_machine_fetchstore2release(volatile void *ptr, int16_t value)
int64_t __TBB_machine_fetchstore8release(volatile void *ptr, int64_t value)
int8_t __TBB_machine_cmpswp1release(volatile void *ptr, int8_t value, int8_t comparand)
int8_t __TBB_machine_fetchadd1__TBB_full_fence(volatile void *ptr, int8_t addend)
void const char const char int ITT_FORMAT __itt_group_sync x void const char ITT_FORMAT __itt_group_sync s void ITT_FORMAT __itt_group_sync p void ITT_FORMAT p void ITT_FORMAT p no args __itt_suppress_mode_t unsigned int void size_t ITT_FORMAT d void ITT_FORMAT p void ITT_FORMAT p __itt_model_site __itt_model_site_instance ITT_FORMAT p __itt_model_task __itt_model_task_instance ITT_FORMAT p void ITT_FORMAT p void ITT_FORMAT p void size_t ITT_FORMAT d void ITT_FORMAT p const wchar_t ITT_FORMAT s const char ITT_FORMAT s const char ITT_FORMAT s const char ITT_FORMAT s no args void ITT_FORMAT p size_t ITT_FORMAT d no args const wchar_t const wchar_t ITT_FORMAT s __itt_heap_function void size_t int ITT_FORMAT d __itt_heap_function void ITT_FORMAT p __itt_heap_function void void size_t int ITT_FORMAT d no args no args unsigned int ITT_FORMAT u const __itt_domain __itt_id ITT_FORMAT lu const __itt_domain __itt_id __itt_id __itt_string_handle ITT_FORMAT p const __itt_domain __itt_id ITT_FORMAT p const __itt_domain __itt_id __itt_timestamp __itt_timestamp ITT_FORMAT lu const __itt_domain __itt_id __itt_id __itt_string_handle ITT_FORMAT p const __itt_domain ITT_FORMAT p const __itt_domain __itt_string_handle unsigned long long value
int8_t __TBB_machine_fetchstore1__TBB_full_fence(volatile void *ptr, int8_t value)
int16_t __TBB_machine_fetchadd2acquire(volatile void *ptr, int16_t addend)
int32_t __TBB_machine_load4_relaxed(const void *ptr)
int64_t __TBB_machine_fetchadd8release(volatile void *ptr, int64_t addend)
void __TBB_machine_store1_relaxed(void *ptr, int32_t value)
int32_t __TBB_machine_fetchadd4__TBB_full_fence(volatile void *ptr, int32_t value)
int8_t __TBB_machine_cmpswp1acquire(volatile void *ptr, int8_t value, int8_t comparand)
int64_t __TBB_machine_cmpswp8release(volatile void *ptr, int64_t value, int64_t comparand)
int32_t __TBB_machine_fetchstore4acquire(volatile void *ptr, int32_t value)
int64_t __TBB_machine_load8_relaxed(const void *ptr)
int64_t __TBB_machine_lg(uint64_t value)
void __TBB_machine_store4_relaxed(void *ptr, int32_t value)
int16_t __TBB_machine_cmpswp2release(volatile void *ptr, int16_t value, int16_t comparand)
Copyright © 2005-2020 Intel Corporation. All Rights Reserved.
Intel, Pentium, Intel Xeon, Itanium, Intel XScale and VTune are
registered trademarks or trademarks of Intel Corporation or its
subsidiaries in the United States and other countries.
* Other names and brands may be claimed as the property of others.